We Are:

At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.

You Are:

You are a highly skilled and motivated R&D Engineer who thrives in a fast-paced, innovative environment. You possess a strong background in developing and maintaining C or C++ based applications on Unix or Linux platforms. Your experience in circuit timing analysis or simulation programs sets you apart, and you have a keen eye for quality and software processes. Designing data structures, algorithms, and applying software engineering principles come naturally to you. With a deep understanding of transistor or gate-level schematics, you are adept at analyzing and optimizing complex digital circuits. Ideally, you hold a Masters or PhD in Computer Science, Electrical Engineering, or Computer Engineering, coupled with over 2 years of relevant industry experience.

What You’ll Be Doing:

Designing and developing circuit simulation and timing modeling algorithms.
Supporting analysis and optimization of high-speed, low-power custom digital circuits.
Working on cutting-edge projects involving multi-million transistor ICs and SoC chips.
Collaborating with a high-caliber R&D team to create innovative technologies and products.
Maintaining and enhancing C or C++ based applications on Unix or Linux environments.
Ensuring adherence to quality and software processes.

The Impact You Will Have:

Enabling the development of high-performance silicon chips for next-generation devices.
Contributing to the advancement of static timing analysis and optimization technologies.
Driving innovation in the design and simulation of complex digital circuits.
Enhancing the efficiency and reliability of custom digital circuits used in smart devices.
Supporting the creation of cutting-edge technologies that power modern computing systems.
Collaborating with industry experts to push the boundaries of technology.

What You’ll Need:

Industry experience in developing and maintaining C or C++ based applications on Unix or Linux platforms.
Experience in circuit timing analysis or simulation program development.
Proficiency in quality and software processes.
Strong skills in designing data structures and algorithms.
Ability to analyze transistor or gate-level schematics.
A Masters or PhD in Computer Science, Electrical Engineering, or Computer Engineering, with 2+ years of relevant experience.

Who You Are:

A collaborative team player with excellent communication skills.
A problem-solver who can tackle complex technical challenges.
Detail-oriented and committed to producing high-quality work.
Innovative and always looking for ways to improve and optimize.
Adaptable and able to thrive in a dynamic environment.

The Team You’ll Be A Part Of:

You will be joining a high-caliber R&D team that focuses on creating technologies and products for static timing analysis and optimization of custom digital circuits. The team collaborates closely to design algorithms and models that support the analysis and optimization of advanced, multi-million transistor ICs and SoC chips. Together, you will work on projects that are at the forefront of technology, driving innovation and excellence in the industry.

Rewards and Benefits:

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

Staff Signoff R&D Engineer